Oscilloscope

OSCILLOSCOPE MODEL

Overview

The VSM Oscilloscope is supplied as standard with all versions of ProSPICE and models a basic four beam unit and is specified as follows:

  • Four channel or X-Y operation.
  • Channel gain from 20V/div to 2mV/div with 2.5x accurate set-up.
  • Timebase from 200ms/div to 0.5us/div with 2.5x accurate set-up.
  • Automatic voltage level triggering locked to either channel.
  • AC or DC coupled inputs.
  • A+B and C+D channel modes.
  • Invert button for each channel.
  • Mouse zoom in and out.
  • Cursors measurement.
  • One-shot mode with zoom in and out possibility.
  • Printing.
  • Colour change for each channel.

Using the Oscilloscope

To display analog waveforms

  1. Pick the OSCILLOSCOPE object by selecting the Meter icon in ISIS and then selecting the Oscilloscope from the Object Selector.
  2. Place one on the schematic and wire its inputs to the signals you want to record.
  3. Start an interactive simulation by pressing the play button on the Animation Control Panel. The oscilloscope window should appear.
  4. Set the timebase dial in Horizontal section to a suitable value for the circuit. You will need to think about the waveform frequencies present in your circuit, and convert these to cycle times by taking their reciprocal.
  5. If displaying signals with a DC offset, select AC mode on either or every input channel as appropriate. You can also turn off unused channels by choosing OFF mode.
  6. Adjust the voltage and position dials in Channel A...Channel D sections so that the waveforms are of a suitable size and position. If a waveform consists of a small AC signal on top of a large DC voltage you may need to connect a capacitor between the test point and the oscilloscope, as the position controls can compensate for only a certain amount of DC.
  7. Decide which channel you want to trigger off, using the Source slider from Trigger section.
  8. Choose the required part of waveform by using the slider from Trigger section It will lock to rising slopes if the slider points up, and falling slopes if it points down.

Modes of Operation

The oscilloscope can operate in the following modes:

  • Auto - the Auto button LED is lit in this mode.
  • One-Shot - the Auto button LED is off. In this mode the One-Shot LED will be lit if capturing is in progress and off after the finishing capture.
  • X-Y mode - the Source slider form Horizontal section positioned in selected X channel.

Triggering

The VSM oscilloscope provides an automatic triggering mechanism which enables it synchronize the timebase to the incoming waveform.

  • The Source slider in the Trigger section can select which input channel is used for triggering.
  • The AC/DC slider is used for selection of absolute or channel-linked trigger offset.
  • The Level dial used for trigger offset value setup.
  • The Edge selection slider is used for choosing rising or falling edge of waveform.

Input Coupling

Each input channel can either be directly coupled (DC coupling) or coupled through a simulated capacitance (AC coupling). The latter mode is useful for displaying signals that carry a small AC signal on top of a much larger DC bias voltage.

The inputs may also be temporarily grounded by selecting the GND slider position that can be useful when aligning them to the graticule prior to taking measurements. Inputs may be switched off by moving the slider into the OFF position. Two inputs can be summed by using A+B or C+D buttons. Using Invert button each channel may be inverted.

Taking Measurements

Measuring of voltage, difference of voltages, time difference between trigger point and current of between any two points can be performed by using the cursors. To use this feature select the Cursors button. To set absolute cursor into screen just move the mouse to appropriate position and press left mouse button. To set different cursor, move mouse while left button is depressed. Cursors can be moved by mouse (while mouse is over any lines of the cursor) as well as deleted using the context menu – items “Delete Cursor” or “Clear All Cursors”.

Deleting a Cursor from the Oscilloscope

Printing

Current waveform displayed on the screen can be printed using context menu item “Print…”.

Colours

Colours of each channel can be changed in “Colours Setup” dialog which one can be opened by choosing context menu item “Colours Setup…”.

You can also change the Colours by right clicking on the Oscilloscope and selecting Setup


Logic Analyser

LOGIC ANALYSER MODEL

Overview

The VSM Logic Analyser is supplied as standard with both ProSPICE Professional.

A logic analyser operates by continuously recording incoming digital data into a large capture buffer. This is a sampling process, so there is an adjustable Capture Resolution, which defines the shortest pulse that can be recorded. A Trigger section monitors the incoming data and causes the data capture process to stop a certain time after the triggering condition has arisen; capturing is started by arming the instrument. The result is that the contents of the capture buffer both before and after the trigger time can be displayed. Since the capture buffer is very large (40000 samples, in this case) a means of zooming and panning the display is provided. Finally, movable measurement cursors allow accurate timing measurements of pulse widths and so forth.

The VSM Logic Analyser models a basic 24 channel unit specified as follows:

  • 8 x 1 bit traces and 4 x 8 bit bus traces.
  • 40000 x 52 bit capture buffer.
  • Capture resolution from 200us per sample to 0.5ns per sample with corresponding capture times from 4s to 10ns.
  • Display zoom range from 1000 samples per division in to 1 sample per division.
  • Triggering on ANDed combination of input states and/or edges, and bus values.
  • Trigger position can be changed from –50% to +50% of the capture buffer.
  • Cursors provided for taking accurate timing measurements.

Using the Logic Analyser

To capture and display digital data

  1. Pick the LOGIC ANALYSER object by selecting the Meter icon in ISIS and then selecting the Logic Analyser from the Object Selector.

  2. Start an interactive simulation by pressing the play button on the Animation Control Panel. The logic analyser popup window should appear.
  3. Set the Resolution dial to a value suitable for your application. This represents the smallest width of pulse that can be recorded. The finer the resolution, the shorter will be the time during which data is captured.

  4. Set the sliders and combo-boxes on the left of the instrument to define the required trigger condition. For example, if you want to trigger the instrument when the signal connected to channel 1 is high and the signal connected to channel 3 is a rising edge, you would set the first slider to “High” and the third slider to “Low-High”.

  5. Decide whether you want to view data mainly before or after the trigger condition occurs, and set the Position dial to required trigger position.
  6. When you are ready, click the Capture button to arm the instrument. The Capture button will light by pink colour. The logic analyser will now wait for trigger event and capture incoming data continuously whilst monitoring the inputs for the trigger condition. When this occurs, the Capture button will light by green colour. Data capture will then continue until the part of the capture buffer after the trigger position is full, at which point the Capture button will extinguish and the captured data will appear in the display.

Panning and Zooming

Since the capture buffer holds 10000 samples, and the display is only 400 pixels wide, a means is needed to pan and zoom within the capture buffer. The Display Scale dial determines the number of samples per division, whilst the scroll-bar attached to the display itself allows you to pan left and right.

Note that he readout located beneath the Display Scale dial displays the current time per division in seconds, not the actual setting of the dial itself. The division time is calculated by multiplying the zoom setting by the resolution.

Taking Measurements

Adjustable cursors are provided which can be used for taking accurate time measurements. To use this feature lit up the Cursors button. To set absolute cursor into screen just move the mouse to appropriate position and press left mouse button. To set different cursor, move mouse left and right while left button is depressed. Cursors can be moved by mouse (while mouse is over any lines of the cursor) as well as deleted using the context menu – items “Delete Cursor” or “Clear All Cursors”.

Printing

Current waveform displayed on the screen can be printed using context menu item “Print…”.

Colours

Colours of each channel can be changed in “Colours Setup” dialog which one can be opened by choosing context menu item “Colours Setup…”.


Signal Generator

SIGNAL GENERATOR MODEL

Overview

The VSM Signal Generator is supplied as standard with both ProSPICE Professional. It models a simple audio functional generator with the following features:

  • Square, saw-tooth, triangle and sine output waveforms.
  • Output frequency range from 0-12MHz in 8 ranges
  • Output amplitude from 0-12V in 4 ranges.
  • Amplitude and frequency modulation inputs.

Using the Signal Generator

To set up a simple audio signal source

  1. Pick the SIGNAL GENERATOR object by selecting the Meter icon in ISIS and then selecting the Signal Generator from the Object Selector. Place one on the schematic and wire its outputs into the rest of the circuit. In most circumstances (i.e. unless the circuit you are driving requires a balance input source), you will want to ground the -ve terminal of the generator. You most easily achieve this using a ground terminal. The amplitude and frequency modulation inputs can be left unconnected unless you are using these features.

  2. Start an interactive simulation by pressing the play button on the Animation Control Panel. The signal generator popup window should appear.
  3. Set the frequency range dial to a value suitable for your application. The range values indicate the frequency that is generated when the center vernier control is set at 1.

  4. Set the amplitude range dial to a value suitable for your application. The range values indicate the amplitude that is generated when the level vernier control is set at 1. The amplitude values represent peak output levels.

  5. Push the waveform button until the LED next to the appropriate waveform icon is lit.

Using AM & FM Modulation Inputs

The signal generator model supports both amplitude and frequency modulation of the output waveform. Both the amplitude and frequency inputs have the following features:

  • The gain of the modulation input in terms of Hz/V or V/V is set by the Frequency Range and Amplitude Range controls respectively.
  • The modulation input voltages are clamped at +/- 12V.
  • The modulation inputs have infinite input impedance.
  • The voltage at the modulation input is added to the setting of the appropriate vernier control before being multiplied by the range setting to determine the instantaneous output frequency of amplitude.

For example, if the frequency range is set at 1KHz, and the frequency vernier is set at 2.0, then a frequency modulation level of 2V will give an output frequency of 4kHz.


Pattern Generator

PATTERN GENERATOR MODEL

Overview

The VSM Pattern Generator is the digital equivalent of the analogue Signal Generator and is provided as standard with all professional versions of the Proteus simulation software.

The VSM Pattern Generator allows for an 8-bit pattern of up to 1K bytes and supports the following main features:

  • Will run in either graph based or interactive mode.
  • Internal and External Clocking and Trigger modes.
  • Vernier adjustment for both clock and trigger dials.
  • Hexadecimal or Decimal grid display modes.
  • Direct entry of specific values for greater accuracy.
  • Loading and saving of pattern scripts.
  • Manual specification of pattern period length.
  • Single Step control allows you to advance the pattern incrementally.
  • Tooltip Display allows you to see exactly where you are on the grid.
  • Ability to externally hold the pattern in it’s current state.
  • Block Editing commands on the grid for easier pattern configuration.

Using the Pattern Generator

To output a pattern in an interactive simulation

  1. Pick the PattGen by selecting the Meter icon in ISIS and then selecting the Pattern Generator from the Object Selector.

  2. Initialise an interactive simulation by pressing the pause button on the Animation Control Panel. The Pattern Generator window should appear.
  3. Specify the pattern that you want to output by left clicking on grid squares to toggle their logic states.
  4. Decide whether you are clocking internally or externally and set the clock mode button to reflect your choice.

  5. If you are clocking internally adjust the clock dials to specify the desired clock frequency.

  6. Decide whether you are triggering internally or externally and use the trigger buttons to set the mode accordingly. If you are triggering externally you need to think about whether you want to trigger asynchronously or synchronously with the clock.

  7. If you are triggering internally adjust the trigger dials to specify the desired trigger frequency.

  8. Press the play button on the Animation Control Panel to output the pattern.
  9. To advance the pattern by a single clock cycle press the 'Step' button on the Animation Control Panel and then the step button to the left of the grid.

See Trigger Modes for details of the different trigger modes available with the Pattern Generator.

See Additional Functionality for more information on configuring and using the Pattern Generator.

To output a pattern in a graph based simulation

  1. Set up the circuit in the normal way.
  2. Insert probes on the schematic at points of interest and add those probes to the graph.
  3. Right click and then left click on the Pattern Generator on the schematic to get the Edit Component dialogue form.

  4. Configure the Trigger and Clock options.

  5. Load the desired pattern file into the Pattern Generator Script field.

  6. Exit the Pattern Generator Dialogue Form and hit the space bar to run the simulation

The Pattern Generator Component Pins

Data Output Pins (Tri-State Output)

The Pattern Generator can output either on a bus and/or on individual pins.

Clockout Pin (Output)

When the Pattern Generator is clocking internally you can configure this pin to mirror the internal clock pulses. This is set as a property and can be changed via the Edit Component dialogue form. By default this option is disabled as it incurs a performance hit, particularly for high frequency clocks.

Cascade Pin (Output)

The Cascade Pin is driven high when the first bit of the pattern is being driven and remains high until the next bit is driven (one clock cycle later). This means it is high for the first clock cycle on starting the simulation and again for the first clock cycle subsequent to a reset.

Trigger Pin (Input)

This input pin is used to feed an external trigger pulse into the Pattern Generator. There are four external trigger modes which are discussed in detail here.

Clock-In Pin (Input)

This input pin is used to apply external timing to the Pattern Generator. There are two external clocking modes which are discussed in greater depth here

Hold Pin (Input)

This pin, when driven high can be used to pause the Pattern Generator. The pattern will remain at the point it was at until the hold pin is released. For internal clocking and/or trigger the timing will resume relative to the point at which is was paused. For example, on a 1Hz internal clock, if the pattern is paused at time 3.6 seconds and resumed at 5.2 seconds then the next falling clock edge will be at 5.6 seconds.

Output Enable Pin (Input)

This pin must be driven high in order to enable the output pins. If this pin is not high then the Pattern Generator, while still running the specified pattern, will not drive the pattern onto the output pins.

Clocking Modes

Internal Clocking

Internal clocking is negative edge. That is, the clock pulse will be low-high-low per clock cycle.

Internal clocking can be specified either prior to simulation via the Edit Component dialogue form for the Pattern Generator or during a pause in the simulation via the clock mode button.

The Clockout pin, when enabled, mirrors the internal clock. By default, this pin is disabled as it will cause some performance loss (particularly with high frequency clocks) but it can be enabled via the Edit Component dialogue form for the Pattern Generator.

External Clocking

There are two external clocking modes – negative edge (low-high-low) and positive edge (high-low-high).

To clock externally wire the clock pulse to the Clockin pin and select one of the two external clocking modes.

As with Internal clocking you can change the external clocking mode either by editing the component prior to simulation or via the clock mode button during a pause in the simulation

Trigger Modes

Internal Trigger

The Internal Trigger Mode in the Pattern Generator triggers the pattern at specified intervals. If the clocking is internal the clock pulse is reset at this point. This behaviour is shown graphically below.

We are clocking internally at 1Hz and the internal trigger time is set to 3.75sec. The Cascade pin is high while the first bit of the pattern is being driven on the pins and low at all other times.

Note that at trigger time the internal clock is asynchronously reset. The first bit of the pattern is driven onto the output pins (as evidenced by the Cascade Pin being driven high).

External Asynchronous Positive Edge Trigger

The trigger is specified via a positive edge transition on the Trigger Pin. The Trigger actions immediately and the next clock edge will be a low-high transition at time bitclock/2 subsequent to the time of the reset as shown below.

We are clocking internally at 1Hz and the trigger pin goes high at time 3.75sec. Immediately on the positive edge of the trigger pin the clock is reset and the first bit of the pattern is driven onto the pins.

External Synchronous Positive Edge Trigger

The trigger is specified via a positive edge transition on the Trigger Pin. The trigger is latched and will action synchronously with the next falling clock edge as shown below.

We are clocking internally at 1Hz. Note that the clock is unaffected by the trigger and that the trigger actions on the falling clock edge subsequent to the positive edge pulse.

External Asynchronous Negative Edge Trigger

The trigger is specified via a negative edge transition on the Trigger Pin. The trigger actions immediately and the first bit of the pattern is driven onto the output pins.

We are clocking internally at 1Hz. We can see that clock resets on the negative edge of the trigger pulse and that the first bit of the pattern is driven at that time.

External Synchronous Negative Edge Trigger

The trigger is specified via a negative edge transition on the Trigger Pin. The trigger is latched and actions synchronously with the next falling edge clock transition as shown below.

We are clocking internally at 1Hz. Note that the trigger takes place on the falling edge of the trigger pulse and that the pattern does not reset until the falling edge of the clock pulse subsequent to the trigger action.

External Hold

If you want to hold the pattern for a period of time you can do so by arranging for the hold pin to be high during the period in which you want to pause. Releasing the hold pin will restart the pattern synchronously if you are using an internal clock. That is, should the hold pin go high halfway through a clock cycle, then when you release the hold pin the next bit will be driven onto the output pins half a clock cycle later.

When the hold pin goes high the internal clock is paused. On release of the hold pin the clock resumes relative to the point in the clock cycle at which it was paused.

Additional Functionality

Loading and saving a pattern script.

Pattern Scripts can be loaded or saved by right clicking over the grid and selecting the relevant option from the popup menu. This is particularly useful if you want to use a particular pattern in several designs.

The pattern scripts are plain text and are simply a comma-separated list of bytes where each byte value represents a column on the grid. Any line beginning with a semi-colon is taken to be a comment line and is ignored by the parser. By default the byte format is hexadecimal though if you are creating your own script you can enter values is decimal, binary or hexadecimal.

Setting specific values for dials.

You can specify an exact value for both the bit and the trigger frequency by double clicking the mouse on the appropriate dials. This launches a floating edit box into which you can enter the value. By default the value entered is assumed to be a frequency but you can specify a value in seconds or fractions thereof by appending a suitable suffix to the value (sec, ms, etc.). Additionally, should you wish the trigger to be an exact multiple of the bit clock you can append the suffix ‘bits’ to the multiple desired (e.g. 5bits).

To confirm input press the Enter button or to cancel press the Escape key or click elsewhere on the Pattern Generator window.

These values can also be specified prior to simulation via the appropriate properties in the Edit Component dialogue form.

Setting specific values for the pattern grid.

You can specify a specific value for any column on the grid by left clicking the mouse on the text displaying the current value for that column. A floating edit box is launched into which you can enter the desired value. You can specify the value in decimal (e.g. 135), hexadecimal (e.g. 0xA7) or binary (e.g. 0b10110101).

To confirm input press the Enter button or to cancel press the Escape key or click elsewhere on the Pattern Generator window.

For convenience you can set a column via the CTRL+1 keyboard shortcut and clear a column via the CTRL+SHIFT+1 keyboard shortcut with the mouse over the appropriate column.

Specifying the period length of the pattern manually.

You can specify a manual period by left clicking the mouse just above the grid itself at the column you want the pattern to finish on. To deselect the period right click the mouse once in the same area.

Single stepping to advance the pattern.

The step button can be used to advance the simulation in time periods equal to that of the bitclock specified either internally or from an external clock. The simulation will run until the next clock cycle is completed and then suspend again.

Alternating the grid display mode.

The grid display can be switched between hexadecimal and decimal display modes. This can be done either by right clicking on the grid and selecting the desired option from the menu or alternatively by using the CTRL+X (Hexadecimal display) and CTRL+D (Decimal display) shortcut keys.

Specifying Output.

Edit the Schematic part for the Pattern Generator to produce the Edit Component dialogue form. The property at the bottom allows you to configure whether you want to output the pattern on both bus and pins, pins only or bus only.

Tooltip Display.

You can enable a tooltip which will follow the mouse indicating the current row and column information. This can be toggled on and off either via the context mouse on the right mouse button or through the shortcut key CTRL+Q. Note that tooltip mode is disabled during a Block set or clear.

Block Editing.

You can use the Block Set and Block Clear commands to help you quickly configure the grid to the desired pattern. These are accessible via the context menu on the right mouse button or via their shortcut keys (CTRL+S for Block set and CTRL+C for Block clear). Note that the Block Editing commands are disabled when in tooltip mode.


Timer Counter

TIMER COUNTER MODEL

Overview

The VSM Counter Timer is a multi-purpose digital instrument which can be used to measure time intervals, signal frequency and pulse counts.

The counter timer supports the following operating modes:

  • Timer mode (seconds), resolution 1µs.
  • Timer mode (hours, mins, secs), resolution 1ms.
  • Frequency meter mode, resolution 1Hz.
  • Counter mode - maximum count 99,999,999.

The time, frequency or count value is displayed both on the schematic component and also optionally on the counter timer popup as shown above. You can make the popup appear either by clicking left on the counter timer component or by selecting it from the Debug menu whilst the simulation is running.

Using the Timer Mode

To measure time intervals:

  1. Select the Multimeter icon, pick the COUNTER TIMER and place one on the schematic.

  2. If appropriate, wire the CE (clock enable) pin to a signal that will control when the time display advances. If you don't require a clock enable function you can leave this pin floating.
  3. If appropriate, wire the RST (reset) pin to a signal that will switch state to reset the timer to zero. If you don't need to reset the timer from within the circuit you can leave this pin floating.
  4. Point at the Counter Timer and press CTRL - E to edit its settings.

  5. Select the required timer mode (secs or hms) and logic polarities for the CE and RST functions.

  6. Start the simulation in the usual way.

The RST pin is edge triggered as opposed to level triggered. If you need to hold the timer at zero, you can use the CE and RST pins in combination.

The Counter Timer popup provides a manual reset button which will reset the timer to zero at any point during the simulation run. This can be especially useful in embedded systems work where you can use the Counter Timer to establish the time taken to execute particular sections of a program.

Using the Frequency Mode

To measure the frequency of a digital signal:

  1. Select the Multimeter icon, pick the COUNTER TIMER and place one on the schematic.

  2. Wire the CLK (clock) pin to the signal you wish to measure. The CE and RST pins are not used in frequency mode.
  3. Point at the Counter Timer and press Ctrl-E to edit its settings and then select Frequency Mode

  4. Close the dialogue and start the simulation in the usual way.

The frequency meter works by counting the number of positive edge transitions occurring in each second of simulation time. Consequently it needs a full second of steady input signal to display a valid reading. Also, if the simulation is not occurring at real time speed (due to heavy CPU load), the frequency meter will take longer in real time to produce a reading.

The counter timer is a purely digital component. To measure the frequency of a low level analogue signal you will need to place an ADC primitive with appropriate logic thresholds in front of the counter timer CLK pin. Also, due to the fact that analogue simulation is approximately 1000 times slower than digital simulation, the Counter Timer is not really suitable for determining the frequency of analogue oscillator circuits operating much above 10kHz. In such cases you should use the virtual oscilloscope (or a graph) to measure the signal period.

Using the Counter Mode

To count digital pulses

  1. Select the Multimeter icon, pick the COUNTER TIMER and place one on the schematic, wiring the CLK (clock) pin to the source signal.

  2. If appropriate, wire the CE (clock enable) pin to a signal that will control when the count advances. If you don't require a clock enable function you can leave this pin floating.
  3. If appropriate, wire the RST (reset) pin to a signal that will switch state to reset the count to zero. If you don't need to reset the counter from within the circuit you can leave this pin floating.
  4. Point at the Counter Timer and press CTRL - E to edit its settings.
  5. Select Counter Mode) and appropriate logic polarities for the CE and RST functions.

  6. Start the simulation in the usual way.

The count advances on positive edge transitions of the CLK when CE is active.

The RST pin is edge triggered as opposed to level triggered. If you need to hold the count at zero, you can use the CE and RST pins in combination.

The Counter Timer popup provides a manual reset button which will reset the count to zero at any point during the simulation run.


Virtual Terminal

VIRTUAL TERMINAL MODEL

Overview

The VSM Virtual Terminal enables you to use the keyboard and screen of your PC to send and receive RS232 asynchronous serial data to and from a simulated microprocessor system. It is especially useful in debugging where you can use it to display debug/trace messages generated by the software which you are developing.

The Virtual Terminal is specified as follows:

  • Fully bi-directional - received serial data is displayed as ASCII characters whilst key presses are transmitted as serial ASCII data.
  • Simple two wire serial data interface: RXD for received data and TXD for transmitted data.
  • Simple two wire hardware handshake interface: RTS for ready-to-send and CTS for clear-to-send.
  • Baud rate from 300 to 57,600 baud.
  • 7 or 8 data bits.
  • Odd, even or no parity.
  • 0, 1 or 2 stop bits.
  • XON/XOFF software handshaking in addition to hardware handshaking.
  • Normal or inverted polarity for both RX/TX and RTS/CTS signals.

Using the Virtual Terminal

To attach a teletype terminal to your simulated target system:

  1. Select the Multimeter icon, pick the VIRTUAL TERMINAL and place one on the schematic.

  2. Wire the RX and TX pins to the transmitting and receiving lines of the system under test. RX is an input and TX is an output.
  3. If you the target system uses hardware handshaking, wire the RTS and CTS pins to the appropriate flow control lines. RTS is an output, signalling that the virtual terminal is ready to receive data, whilst CTS is an input which must be high (or floating) before the virtual terminal will transmit.
  4. Edit the virtual terminal component to select the required baud rate, word length, parity, flow control and polarity settings.

  5. Start the simulation in the usual way. The terminal will display incoming data as soon as it is received; to transmit characters into the system, make sure the terminal popup has the focus and then type the required text on the PC keyboard.
  6. Once the simulation is started, further functionality is available from a context menu which may be displayed by clicking right on the popup window. This menu enables you to pause the display, and to copy and paste text to and from the clipboard.

The Virtual Terminal supports the ASCII control codes CR (0Dh), BS (0x08h) and BEL (0x07h). All other codes including LF (0x0A) are ignored.

The Virtual Terminal is a purely digital model and as such does not require any particular voltage levels on its pins. The assumption is that it will normally be wired directly to a CPU or UART rather than to the output side of an RS232 driver such as the MAX232 which contains logic inverters.

The RX and TX pins default to active high. Thus the idling state is high, the start bit is low and the stop bit high. Data bits appear as logic high for '1' and logic low for '0'. This is directly compatible with the on board UARTs present in many microcontrollers, and also with external UARTs such as the 6850 and 8250. If this is not the case (typically because you are connecting the terminal on the output side of an RS232 driver) you will need to set the RX/TX polarity to be inverted.

The RTS and CTS pins are also active high. If you wish to connect them to inverted control lines (i.e. RTS/CTS bar), you should set the RTS/CTS polarity to be inverted.

By default, the terminal does not display (echo) the characters you type; the assumption is that the host system to which it is connected will do this. If you wish the terminal to display typed characters itself, you should select Echo Typed Characters from the context menu.

You can pre-define text to be transmitted into your circuit at start up using the TEXT property. e.g.

TEXT="Hello World"

will transmit the text "Hello World" into the circuit. The script text is transmitted one character time after start up, unless CTS is inactive.

MAX232 Model

Proteus VSM includes a model for the MAX232 RS232 driver and it is thus possible to connect the virtual terminal to a target CPU as shown below:

It is vital to note that the MAX232 contains logic inverters and so the RX/TX polarity of the virtual terminal must be changed to inverted if this circuit is to simulate properly.

Please note also that the MAX232 is modelled at the digital level only - no attempt is made to simulate the operation of its internal voltage converters etc. Simulating these features would incur a huge performance overhead for little purpose. The same performance hit will also be incurred if you connect any analogue components (resistors, capacitors, oscilloscope etc.) to the TxOut/RxIn pins.


SPI Debugger

SPI PROTOCOL ANALYSER

Overview

The SPI Protocol Analyzer model allows you to monitor and interact with an SPI interface. The protocol analyzer not only allows you to view data sent along the SPI bus but also lets you send data directly onto the bus. The terminal can operate in one of three modes:

  • Slave Mode: The terminal behaves like a slave SPI device.
  • Master Mode: The terminal behaves like a master SPI device.
  • Monitor Mode: The terminal merely reports on what is being sent across the SPI bus.

The Schematic Part

The schematic part for the SPI Protocol Analyzer is shown below :

Pin Descriptions

SCK Pin:

The SCK pin is a bi-directional pin which is connected to the clock line of your SPI bus, in slave mode it behaves as an input, in master mode as an output

DIN Pin:

DIN is the data input to the terminal model from the SPI data bus.

DOUT Pin:

DOUT is the data output from the terminal model to the SPI bus.

SS Pin:

SS is the slave select pin, in slave mode this must be active for the terminal to respond, in master mode this pin goes active whilst data is being transmitted

TRIG Pin:

TRIG is an input that places the next stored sequence into the SPI output queue

The SPI Debugger Window

When a simulation is paused or free running the Protocol Analyzer window will become available (if it does not automatically appear it can be launched from the Debug Menu in ISIS). This screen is split into several areas and allows you not only to monitor the activity on the SPI bus but also to stimulate the bus either as a Master or Slave device.

Input Data Display

The main window area (the top left portion of the popup) shows you all the activity recorded on the bus. As can be seen from the example above you can drill down to the level of viewing individual bit transmissions.

When viewing at byte level or higher the time of the start and the stop of the sequence is recorded. When viewing at bit level both the logic state of the pins and the bit designator is recorded in the display alongside the time.

While not visible on the screenshot above the arrows are bi-directional to indicate transmission or reception of data (reception in the case above) and the arrow itself will appear with a question mark if an invalid sequence is detected. This, together with the ability to drill down into individual bit data is invaluable when debugging potential problems.

Predefined Sequences List

The predefined sequences list at the top right displays a queue of pre-programmed data sequences that can be transmitted onto the bus. You can add a pre-defined sequence by typing in the Sequence Entry Box as described below (use the Add button to commit the sequence to this list).

Double clicking on a predefined sequence (or highlighting the predefined sequence and clicking on the Queue control button) while the simulation is running will add that sequence to the Buffered/Queued Sequence list for transmission on the bus. Note that the time for transmission depends on bus activity, whether we are a master or slave device etc. and so may well not be instantaneous

Buffered / Queued Sequences List

The buffered sequences list is located at the bottom left of the window and displays a queue of sequences that will be transmitted by the SPI analyzer at the next available opportunity. You can add a buffered sequence by typing in the Sequence Entry Box as described below (Use the Queue button to commit the sequence to this list)

Sequence Entry Box

This box (near the bottom right of the window) allows you to enter sequences to either places on the programmed sequence list or to immediately place on the output queue to be sent to the DOUT pin at the next available opportunity. The following syntax is supported.

Syntax | Description
'0x' | Can be used as a prefix to denote hexadecimal values (e.g 0xFE)
'$' | Can be used as a prefix to denote hexadecimal values (e.g %FE)
'h' | Can be used as a prefix to denote hexadecimal values (e.g FEh)
'%' | Can be used as a prefix to denote binary values (e.g %1101)
'b' | Can be used as a prefix to denote binary values (e.g 1101b)
'd' | Can be used as a prefix to denote decimal values (e.g 47d)

Note that hexadecimal and binary values must have either a prefix or suffix qualifier. The decimal suffix is optional. Strings must be enclosed in either double or single quotation marks.

Use the Control Buttons to determine whether a given sequence is added to the Pre-defined Sequence List or to the Buffered/Queued Sequence List

Control Buttons

The control buttons are used to allow you to provide stimulus to the SPI bus. The protocol analyzer is fully capable of acting as either a master or as a slave device so this provides an invaluable way of testing your SPI implementation.

Add Button

Use this to commit a sequence defined in the Sequence Entry Box to the Pre-defined sequences list for later use.

Delete Button

Use this to delete a sequence in the Pre-defined sequences list.

Queue Button

Use this button to queue selected items either directly from the Sequence Entry Box or from the Pre-defined Sequence List. Queued items will then appear in the Buffered/Queued Sequences List.

Model Properties

The SPI Debugger has a number of properties which allow you to configure it as required. All properties are accessible via the Edit Component dialogue form (right click on the schematic part to highlight and then left click to edit). Details of individual properties are given below :

Property | Description
WORDLENGTH | Specified the number of bits in each word transferred. This can be any value from 1 to 16 inclusive.
BITORDER | Specifies the bit order of each word transferred. This can be MSB first of LSB first.
SAMPLEEDGE | Specifies if the sampling of the DIN pin is made when SCK goes from idle to active or when SCK transitions from active to idle.
IDLESTATE | Specifies if SCK is idle when high or when low.
STOPONEMPTY | Indicates if the simulation should be paused when the output buffer is empty.
SEQUENCE_FILE | Allows you to specify the file name of the text file where predefined output sequences are stored. If this property is left blank sequences are stores as part of the devices properties.
MODE | Controls the selection of master or slave mode.
CLOCKFREQ | In master mode this controls the clock frequency on SCK.
AUTOLOAD | Controls if the predefined sequences are immediately placed into the sequence queue upon simulation start-up.
WRAPLENGTH | Specifies the number of owrds permitted on a single line before a new line is created.
TIMEPREC | The number of decimal places by which time is to be displayed.
DATAINVERT | Indicates if the date on DOUT and DIN is to be inverted.
LOOPBACK | When enabled any received word is queued for transmission.

Using the SPI Debugger

To receive data with the SPI Debugger:

Viewing data on the SPI bus requires that you connect the SCK and DIN pins of the terminal to the relevant pins in your design, then set the word length, bit order, SCK idle state and sampling edge properties of the terminal model. Data on the SPI bus will be displayed in the upper left hand side of the terminal window as hexadecimal values. If a received data word is incomplete, such that SS becomes inactive before a whole word is received, asterisks will be displayed instead of a hexadecimal value.

If bits of a received data word on DIN were floating of in contention then question marks will be displayed instead of a hexadecimal value.

To transmit data with the SPI Debugger:

Sending data over the SPI bus requires that you connect the SCK and DOUT pins of the terminal to the relevant pins in your design, then set a word length bit order, SCK idle state and sampling edge properties of the terminal model.

Transmission data entry is done in the lower right hand side of the terminal window, just above the buttons (See Sequence Entry Box above). Entries can be single words, comma or space separated sequences of words, or text strings enclosed in double or single quotation marks. Word values can be in decimal, hexadecimal or binary. Hexadecimal values are denoted by either a '0x' or '$' prefix, or by a 'h' suffix. Binary values are denoted by a '%' prefix or a 'b' suffix. Decimal values need neither a prefix or suffix but may optionally have a 'd' suffix.

Once you have entered your transmission sequence you may either directly queue the data sequence to be sent or have the data sequence placed on the predefined sequences list for later use. To immediately place the transmission sequence onto the buffered sequences list press the queue button, to place the transmission sequence into the predefine sequences list press the add button.

To place a copy of one of the predefined sequences into the buffered sequences queue, ensure the sequence entry box is empty, select the predefined sequence then press the queue button.

To remove an entry from the predefined sequences, select the predefined sequence to be removed, then press the delete button.


I2C Debugger

I2C PROTOCOL ANALYSER

Overview

The I2C Protocol Analyzer allows you to monitor and interact with the I2C bus. The analyzer has two purposes: to allow you to view data sent along the I2C-bus and to permit you to send data onto the I2C-bus either as a master or as a slave device. This makes it invaluable both as a debugging instrument but also as a development and testing aid when writing your own I2C routines (not to mention being a fraction of the cost of it’s hardware equivalent).

The Schematic Part

The schematic part for the I2C Protocol Analyzer is extremely simple as shown below.

Pin Descriptions

SCL Pin:

The SCL pin is a bi-directional pin which is connected to the clock line of your I2C-bus

SDA Pin:

The SDA pin is a bi-directional data line for the I2C-bus.

TRIG Pin:

The TRIG pin is an input that causes the successive stored sequences to be placed onto the output queue.

The I2C Debugger Window

When a simulation is paused or free running the Protocol Analyzer window will become available (if it does not automatically appear it can be launched from the Debug Menu in ISIS). This screen is split into several areas and allows you not only to monitor the activity on the I2C bus but also to stimulate the bus either as a Master or Slave device.

Note that free running a simulation with lots of I2C bus activity and a protocol analyzer will incur a significant performance hit. While certainly not a problem when debugging or monitoring activity it can be useful to detach the device for non-bus related simulation passes.

Input Data Display

The main window area (the top left portion of the popup) shows you all the activity recorded on the bus. As can be seen from the example above you can drill down to the level of viewing individual bit transmissions. The special sequence characters used to denote activity should be fairly obvious but is covered in more detail here.

When viewing at byte level or higher the time of the start and the stop of the sequence is recorded. When viewing at bit level both the logic state of the pins and the bit designator is recorded in the display alongside the time.

While not visible on the screenshot above the arrows are bi-directional to indicate transmission or reception of data (reception in the case above) and the arrow itself will appear with a question mark if an invalid sequence is detected. This, together with the ability to drill down into individual bit data is invaluable when debugging potential problems.

Predefined Sequences List

The predefined sequences list at the top right displays a queue of pre-programmed data sequences that can be transmitted via the SDA pin under the control of the SCL pin. You can add a pre-defined sequence by typing in the Sequence Entry Box as described below (use the Add button to commit the sequence to this list).

Double clicking on a predefined sequence (or highlighting the predefined sequence and clicking on the Queue control button) while the simulation is running will add that sequence to the Buffered/Queued Sequence list for transmission on the bus. Note that the time for transmission depends on bus activity, whether we are a master or slave device etc. and so may well not be instantaneous.

Buffered Sequences List

The buffered sequences list is located at the bottom left of the window and displays a queue of sequences that will be transmitted by the I2C terminal at the next available opportunity. You can add a buffered sequence by typing in the Sequence Entry Box as described below (Use the Queue button to commit the sequence to this list).

Sequence Entry Box

This box (near the bottom right of the window) allows you to enter sequences to either places on the programmed sequence list or to immediately place on the output queue to be sent to the SDA pin at the next available opportunity. The following syntax is supported.

Syntax | Description
'0x' | Can be used as a prefix to denote hexadecimal values (e.g 0xFE)
'$' | Can be used as a prefix to denote hexadecimal values (e.g %FE)
'h' | Can be used as a prefix to denote hexadecimal values (e.g FEh)
'%' | Can be used as a prefix to denote binary values (e.g %1101)
'b' | Can be used as a prefix to denote binary values (e.g 1101b)
'd' | Can be used as a prefix to denote decimal values (e.g 47d)

Note that hexadecimal and binary values must have either a prefix or suffix qualifier. The decimal suffix is optional. Strings must be enclosed in either double or single quotation marks.

Use the Control Buttons to determine whether a given sequence is added to the Pre-definedSequence List or to the Buffered/Queued Sequence List.

Control Buttons

The control buttons are used to allow you to provide stimulus to the I2C bus. The protocol analyzer is fully capable of acting as either a master or as a slave device so this provides an invaluable way of testing your I2C implementation.

Add Button

Use this to commit a sequence defined in the Sequence Entry Box to the Pre-defined sequences list for later use.

Delete Button

Use this to delete a sequence in the Pre-defined sequences list.

Queue Button

Use this button to queue selected items either directly from the Sequence Entry Box or from the Pre-defined Sequence List. Queued items will then appear in the Buffered/Queued Sequences List.

Model Properties

The I2C Debugger has a number of properties which allow you to configure it as required. All properties are accessible via the Edit Component dialogue form (right click on the schematic part to highlight and then left click to edit). Details of individual properties are given below :

Property | Description
ADDRESS1 | If you are using the terminal to simulate a slave device, this property specifies the first address byte of the slave device address. the least significant bit is used by the master to indicate if the transmission is a read or write and is ignored for the purposes of addressing. If you leave this property at its default or blank then terminal will not act as a slave device.
ADDRESS2 | If you are using the terminal to simulate a slave device and you wish to use 10 bit addressing, this property allows you to specify the second address byte. If you leave this blank then 7 bit addressing is assumed.
STOPONEMPTY | Indicates if the simulation should be paused when the output buffer is empty and a byte is required to be sent.
CLOCKFREQ | When in master mode this controls the clock frequency on SCL.
SEQUENCE_FILE | Allows you to specify the file name of the text file where predefined output sequences are stored. If this property is left blank sequences are stored as part of the devices properties.
AUTOLOAD | Controls if the predefined sequences are immediately placed into the sequence queue upon simulation start-up.
TIMEPREC | Allows you to specify the number of decimal places by which time is to be displayed.
WRAPLENGTH | Specifies the number of items permitted on a single line before a new line is created.

Using the I2C Debugger

To receive data with the I2C Debugger:

Viewing data on the I2C-bus requires that you connect the SCL and SDA pins of the terminal to the relevant pins in your design. Data on the I2C-bus will be displayed in the upper left hand side of the protocol analyzer window as hexadecimal values and special sequence characters.

To transmit data with the I2C Debugger:

Sending data over the I2C-bus requires that you connect the SCL and SDA pins of the protocol analyzer to the relevant pins in your design.

Transmission data entry is done in the lower right hand side of the terminal window, just above the buttons. Entries can be single words, comma or space separated sequences of words, or text strings enclosed in double or single quotation marks. A word can be numerical values or special control signals.

Once you have entered your transmission sequence you may either directly queue the data sequence to be sent or have the data sequence placed on the predefined sequences list for later use. To immediately place the transmission sequence onto the buffered sequences list press the queue button, to place the transmission sequence into the predefine sequences list press the add button.

To place a copy of one of the predefined sequences into the buffered sequences queue, ensure the sequence entry box is empty, select the predefined sequence then press the queue button.

To remove an entry from the predefined sequences, select the predefined sequence to be removed, then press the delete button.

Syntax Reference

The following details the syntax used by the protocol analyzer to indicate conditions on the I2C bus.

Syntax | Description
S | Used to denote a start condition.
Sr | Used to denote a restart condition.
P | Used to denote a stop condition.
N | Used to denote a negative acknowledge condition.
A | Used to denote an acknowledge condition.
L | Used to signify that arbitration has been lost, switching to master mode.
* | Used to denote partial data received.
? | Used to denote invalid logic levels detected.


Voltmeters and Ammeters

VOLTMETERS & AMMETERS

Overview

Proteus VSM provides both AC and DC voltmeters and ammeters These operate in real time and can be wired into the circuit just like any other component. Once the simulation is started they display the voltage across their terminals or the current flowing through them in an easy to read digital format.

The FSD of the meters can be set to any of 100, 100m and 100u with a resolution of 3 significant figures and a maximum number of two decimal places by editing the meter component and selecting the required Display Range property.

The voltmeter models support an internal load resistance property which defaults to 100M but which can also be changed by editing the component. in the usual way. Leaving the value blank disables the load resistance element of the model.

The AC voltmeters and ammeters display true RMS values integrated over a user definable time constant.

A wattmeter is also provided which has three functions (active, re-active and apparent) that can be selected from the Edit Component dialogue form of the placed part. The default phase angle is set at 45 degrees; the correct angle for a given circuit can be computed by using either an analog graph or an oscilloscope.

The wattmeter is intended only for use with sine waveforms.


Introduction

VIRTUAL INSTRUMENTS

The following Virtual Instruments are currently provided within the Proteus VSM system :

  • Oscilloscope
  • Logic Analyser
  • Signal Generator
  • Pattern Generator
  • Counter Timer
  • Virtual Terminal
  • SPI Protocol Debugger
  • I2C Protocol Debugger
  • Voltmeters and Ammeters

The help file for any particular Virtual Instrument can be directly accessed via the help button on the Edit Component dialogue for that component.