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ATA/IDE HARD DRIVE

Introduction

The model simulates the basic functions of a parallel ATA hard disk drive, these functions including: initialising the device; reading data; writing data; verifying data; CHS addressing; LBA addressing; responding to device identification requests. This file is by no means full or complete documentation on the operation of the ATA interface and is merely intended as a quick reference to the operation of the ATA interface: users should refer to the relevant standard for more detailed information.

Basic Operation

Given a suitable hardware design and controlling program, the model can be used to simulate applications that will store data on an ATA compatible hard disk or other storage device. The data is stored in a binary file on your actual hard disk (specified by the IDE_IMAGE property), which can be inspected using a 3rd party file editor.

The model is attached to the ATA-HDD component which may be found in the ACTIVE library. This component also includes an activity indicator which will flash whenever a read, write or verify command is executed.

Contents

The following links provide more detailed information on various aspects of the model :

  • Model Properties

  • Hardware Interface

  • Signal Descriptions

  • Device Registers

  • Register Descriptions

  • Command Set

  • Limitations

This help file last modified 05 March 2010.


COMMAND SET

Overview

Below is a general description of the sequence of events required for executing a command, some commands deviate from these sequences, such deviations are noted in the relevant command's section.

  • The host must make sure the drive is not busy and ready for a command by testing that the BSY is clear and that DRDY is set. (Some commands can be executed when DRDY is clear, refer to the ATA standard.)

  • The host most then write to all the appropriate registers, such as the head, cylinder and sectors registers, before executing the command.

  • The host should then write the command to the command register.

  • The drive will then set the BSY flag and clear the DRDY flag.

  • If the command requires a data transfer it is done here, refer to further information below.

  • The drive clears the BSY flag, sets the DRDY flag (if there is no error) and generates an interrupt.

  • The host reads the status register.

  • The drive clears the interrupt.

For a command that requires data to be read by the host during the course of the command, such as sector read or identify device commands, the following additional steps are taken at step 3.

  • The drive reads a sector off disk.

  • When a sector of data is ready to be transferred from the drive, the BSY bit is cleared, DRQ is set and an interrupt is generated.

  • The host reads the status register.

  • The drive clears the interrupt.

  • The host reads the whole sector of data from the data register.

  • The drive clears DRQ

  • If another sector is to be read by the command the BSY flag is set and this sequence is repeated.

For a command that requires data to be written by the host during the course of the command, such as sector write command, the following additional steps are taken at step 3.

  • When a sector of data is required to be transferred from the host to the drive, the BSY bit is cleared, DRQ is set and an interrupt is generated. (The interrupt is generated for all but the first sector to be transferred.)

  • The host reads the status register. (Except for the first sector)

  • The drive clears the interrupt. (Except for the first sector as no interrupt is generated.)

  • The host writes the whole sector of data to the data register.

  • The drive clears DRQ set BSY and writes the sector to disk.

  • If another sector is to be written by the command the sequence is repeated.

Command List

The following list details the commands that can be performed with the ATA/IDE Data storage model.

Nop (0x00)

This command carries out no action other than to return an error consistent with an invalid command code. The intent of this command in the standard is to allow hosts that can only write 16 bits at a time to be able to check the drive status.

Recalibrate (0x10)

This command moves the head to track zero on the drive.

Read sectors (0x20)

Read a number of sectors off the disk.

The number of sectors is specified by the sector count register, a value of 0 indicates a sector count of 256 sectors.

The first sector to be read can be specified as a cylinder, head and sector, by writing to the head, sector and cylinder registers. Alternatively logical block addressing (LBA) can be used by setting the appropriate bit in the drive/head register.

DRQ will be set for each word of data to transfer from the drive.

Upon command completion the cylinder, head and sector registers hold the address of the last sector read. If an error occurred the cylinder, head and sector registers hold the address where the error occurred.

Read sectors once (0x21)

This command behaves similarly to the read sectors command above, however it does not retry upon encountering an error.

Write sectors (0x30)

Write a number of sectors to the disk.

The number of sectors is specified by the sector count register, a value of 0 indicates a sector count of 256 sectors.

The first sector to be written can be specified as a cylinder, head and sector, by writing to the head, sector and cylinder registers. Alternatively logical block addressing (LBA) can be used by setting the appropriate bit in the drive/head register.

DRQ will be set for each word of data to transfer to the drive.

Upon command completion the cylinder, head and sector registers hold the address of the last sector written. If an error occurred the cylinder, head and sector registers hold the address where the error occurred.

Write sectors once (0x31)

This command behaves similarly to the write sectors command above, however it does not retry upon encountering an error.

Verify sectors (0x40)

Verify a number of sectors on the disk.

The number of sectors is specified by the sector count register, a value of 0 indicates a sector count of 256 sectors.

The first sector to be verified can be specified as a cylinder, head and sector, by writing to the head, sector and cylinder registers. Alternatively logical block addressing (LBA) can be used by setting the appropriate bit in the drive/head register.

Upon command completion the cylinder, head and sector registers hold the address of the last sector verified. If an error occurred the cylinder, head and sector registers hold the address where the error occurred.

Verify sectors once (0x41)

This command behaves in exactly the same way as the verify sectors command above.

Seek (0x70)

Moves the head to the track specified.

Execute device diagnostic (0x90)

Perform drive internal diagnostics. The drive selection it is ignored and diagnostics will be performed by all drives on the bus.

Upon completion the diagnostic the result code will be written to the error register. Below is a list of error codes.

0x01 | No error
0x02 | Formatter error
0x03 | Sector buffer error
0x04 | ECC circuit error
0x05 | Microprocessor error
0x8x | Slave device error

Initialise drive parameters (0x91)

This command allows the host to specify a differing cylinder, head, sector geometry from that specified in the drive itself (using properties in our model).

To use this command set the sector count, number of heads minus one and then execute the command.

The the standard states, the sector and head count are not checked for validity and may produce errors on further calls if invalid.

Read multiple (0xC4)

The read multiple command acts in a similar way to the read sectors command, except that an interrupt is only generated after the number of sectors specified by the block count are ready to be transferred to the host. The block count is set by the set multiple mode command.

If the number of sectors to be transferred is not a multiple of the block count, the final block transfer will be the exact number of remaining sectors.

Write multiple (0xC5)

The write multiple command acts in a similar way to the write sectors command, except that an interrupt is only generated after the number of sectors specified by the block count are to be transferred to the host. The block count is set by the set multiple mode command.

If the number of sectors to be transferred is not a multiple of the block count, the final block transfer will be the exact number of remaining sectors.

Set multiple mode (0xC6)

This command enables and sets the block count for multiple block commands. The block count is placed into the sector count register before the command is issued.

Multiple mode should in general support block counts of at least 2, 4, 8 and 16 sectors, though it may support other sizes. If a size is not supported an abort command error is issued and read multiple is disabled.

Identify device (0xEC)

Fills the sector buffer with drive identification information. This command behaves in a similar way to a single sector read, except the data is constructed by the drive and not read off disk and that one does not need to specify a cylinder head or sector.

For a detailed description of the drive identification information please refer to the ATA standards documents.

Set features

Allows the host to control various features of the drive, by setting the features register and then initiating this command.

0x02 | Enable write cache.
0x55 | Disable read lookahead.
0x82 | Disable write cache.
0x66 | Disable power on reversion.
0xAA | Enable read lookahead.
0xCC | Enable power on reversion.


DeviceRegisters

ATA/IDE DEVICE REGISTERS


HARDWARE INTERFACE

Introduction

The ATA interface generally consists of a 40 pin IDC connector and a four pin power connector. The power connector generally has a +5V line, a +12V line, a +5V return line and a +12V return line and is not directly represented in the model as this time. The pin out of the 40 pin IDC connector is shown below. Other types of IDE connector do exist, for example a 3 pin power connector is possible.

Name | Pin | Name | Pin | Name | Pin
$RESET$ | 1 | DD1 | 15 | $DMACK$ | 29
GND | 2 | DD14 | 16 | GND | 30
DD7 | 3 | DD0 | 17 | INTRQ | 31
DD8 | 4 | DD15 | 18 | $IOCS16$ | 32
DD6 | 5 | GND | 19 | DA1 | 33
DD9 | 6 | Key | 20 | $PDIAG$ | 34
DD5 | 7 | DMARQ | 21 | DA0 | 35
DD10 | 8 | GND | 22 | DA2 | 36
DD4 | 9 | $DIOW$ | 23 | $CS1FX$ | 37
DD11 | 10 | GND | 24 | $CS3FX$ | 38
DD3 | 11 | $DIOR$ | 25 | $DASP$ | 39
DD12 | 12 | GND | 26 | GND | 40
DD2 | 13 | IORDY | 27 |  |
DD13 | 14 | SPSYNC:CSEL | 28 |  |

The interconnect between ATA devices and the host system is normally via a 40 way IDC cable not exceeding 46 centimetres in length.


LIMITATIONS

The ATA storage model has the following limitations:

  • The model implements the ATA-1 specification only - not later versions.

  • DMA functionality is not modelled.

  • Timing is modelled in terms of a fixed delay for commands which access data from the drive, but there is no attempt to model physical seek or access times.


PROPERTIES

The following topics details the device properties of the ATA/IDE storage model :

IDE_WARNINGS

These are protocol violation warnings and, when enabled, will output such warning messages to the simulation log.

IDE_IMAGE

Specifies the file and path location where the disk image is to be stored.

IDE_MSC

Dictates if the drive is a master, slave or its status is determined by the SPSYNC:CSEL pin.

IDE_CYLINDERS

The number of cylinders the drive has.

IDE_HEADS

The number of heads the drive has.

IDE_SECTORS_PER_TRACK

The number of sectors per track the drive has.

IDE_SERIAL_NUMBER

A string of up to 20 characters that is returned by the identify device command.

IDE_FIRMWARE_REVISION

A string of up to 8 characters that is returned by the identify device command.

IDE_MODEL_NUMBER

A string of up to 40 characters that is returned by the identify device command.

IDE_SPINUP_TIME

The time it takes a drive to spin up to speed.

  • Note that the total number of sectors is specified by the formula:

IDE_CYLINDERS x IDE_HEADS x IDE_SECTORS_PER_TRACK

and that each sectors occupies 512 bytes. This data is held in the file specified by IDE_IMAGE, so make sure that you have enough free disk space available on your actual hard disk if you are modelling a very large drive.

  • The default values of 16x8x16 produce an image file that will occupy 1MB.


REGISTER DESCRIPTIONS

Alternate Status Register

This register is the same as the status register except that reading it does not imply acknowledgement or clearing of an interrupt.

Device Control Register

7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
X | X | X | X | 1 | SRST | nIEN | 0

Interrupt Enable (nIEN):

When high disables the INTRQ signal being sent if the drive is selected.

Soft Reset (SRST):

When set the all drives on the bus reset. (The DASP handshake is not carried out.)

Drive Address Register

7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
High Z | nWGT | nHS3 | nHS2 | nHS1 | nHS0 | nDS1 | nDS0

Not Drive Selected 0 (nDS0):

When zero, the master drive is selected.

Not Drive Selected 1 (nDS1):

When zero, the slave drive is selected

Not Head Selected (nHS0,1,2,3):

The inverse of the currently selected head, for example, (where nHS0 is the LSB,) 1101b is head 2.

Not Write Gate (nWGT):

Indicates when writing to the drive is in progress.

Data Register

This register is 16 bits wide and is used to transfer data between the device and the host.

Error Register

7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
BBK | UNC | MC | IDNF | MCR | ABRT | TK0NF | AMNF

Address Mark Not Found (AMNF):

The drive has found where the requested sector should be but the sector is not there: sector is missing of corrupt.

Track 0 Not Found (TK0NF):

Track zero has not been found while executing a recalibrate command.

Aborted Command (ABRT):

A command has been aborted, either because the command is invalid or some form of drive status error, such as the drive not being ready.

Media Change Requested (MCR):

If the media is removable, it indicates that the user has requested the ejection of the media by pressing an eject button or some form.

ID Not Found (IDNF):

Could not find the requested sector on the drive: sector is missing or corrupt.

Media Changed (MC):

If the media is removable this indicates that it has been changed.

Uncorrectable Data Error (UNC):

Indicates that corrupt data that cannot be corrected has been found

Bad Block Detected (BBK):

The requested sector has been marked as bad.

Features Register

The format of the data written to this register is command specific.

Sector Count Register

The number of sectors to transfer during a read or write command. A value of zero means 256 sectors. On completion of the command this register indicates the number of sectors that have not been transferred.

Sector Number Register

In CHS addressing mode this register indicates the starting sector of a command. Sectors are numbered from 1: zero is invalid. At the end of a command this register is updates to indicate the current sector.

In LBA mode this register is used for bits 0 to 7 of the sector address.

Cylinder Low Register

In CHS addressing mode this register indicates the low order bits of the starting cylinder of a command. At the end of a command this register is updates to indicate the current cylinder.

In LBA mode this register is used for bits 8 to 15 of the sector address.

Cylinder High Register

In CHS addressing mode this register indicates the high order bits of the starting cylinder of a command. At the end of a command this register is updates to indicate the current cylinder.

In LBA mode this register is used for bits 16 to 23 of the sector address.

Drive and Head Register

It is recommended that this register is set before all others when carrying out a command as it specifies the drive to be used and if LBA or CHS addressing is to be used. (This register does not have to be the first to be written, however it makes tens to make the intentions of the code clearer.)

7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
1 | L | 1 | DRV | HS3 | HS2 | HS1 | HS0

Head Select (HS0,1,2,3):

In CHS mode these bits refer the head to be used. At the end of a command these bits are updated to indicate the current head.In LBA mode they refer to bits 24 to 27 of the sector address.

Drive (DRV):

A zero indicates access to the master a 1 to the slave.

LBA Select (L):

If zero CHS addressing is used, if 1 LBA addressing is used.

Status Register

7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
BSY | DRDY | DWF | DSC | DRQ | CORR | IDX | ERR

Error (ERR):

An error happened during the course of a commands execution. The error register may have additional information on the nature of the error.

Index (IDX):

This bit is set one per drive revolution.

Corrected Data (CORR)

Corrupted data was encountered during the course of a command but it was corrected. The command may have completed successfully.

Data Request (DRQ)

A data word is ready to be transferred too or from the device.

Drive Seek Complete (DSC):

Indicates a track seek has successfully been completed.

Drive Write Fault (DWF):

Indicates a write fault.

Drive Ready (DRDY):

The drive is ready to act upon a command. If there is an error this bit will not be cleared until the status register has be read.

Busy (BSY):

This is set when the command block registers should not be accessed.

Command Register

Command codes are written to this register, upon writing a command code the associated command is immediately executed. Below is a list of supported commands.

Number | Command | Description
0x00 | NOP | Perform no operation
0x10 | Recalibrate | Move head to cylinder 0.
0x20 | Read Sectors | Read sectors from disk.
0x21 | Read Sectors Once | Read sectors from disk. (Do not retry on error.)
0x30 | Write Sectors | Write sectors to disk.
0x31 | Write Sectors Once | Write sectors to disk. (Do not retry on error.)
0x40 | Verify Sectors | Verify sectors on disk.
0x41 | Verify Sectors Once | Verify sectors on disk. (Do not retry on error.)
0x70 | Seek | Seek a sector
0x90 | Execute Device Diagnostic | Causes all drives to execute internal diagnostics.
0x91 | Initialise Drive Parameters | Allow the host to set the number of cylinders heads and sectors used for translation.
0xC4 | Read Multiple | Read sectors from disk. (Less interrupts.)
0xC5 | Write Multiple | Write sectors to disk. (Less interrupts.)
0xC6 | Set Multiple Mode | Set number of sectors per block in multiple mode.
0xE6 | Sleep | Get the drive to enter sleep mode.
0xEC | Identify Device | Fill the sector buffer with drive identification information.
0xEF | Set Features | Set drive features

While there are many more commands in the ATA standard, these are the only ones that this model presently supports.


SIGNAL DESCRIPTIONS

The following is a description of all the signal pins on the schematic part for the ATA/IDE Data Storage Model :

$RESET$

The reset input is brought low for a minimum of 25 microseconds after power levels have stabilised to reset the device. It may be brought low any time thereafter to reset the device.

GND

Signal ground.

DD0 -> DD15

These signals form an eight or sixteen bit bi-directional data bus between the device and the host. In eight bit mode only signals DD0 to DD7 are used.

KEY

This is not actually a signal but a pin that can be non existent on the IDC header plugs, allowing the connector to be inserted only one way.

DMARQ

This output is asserted by the drive when the drive wishes to make a DMA transfer. (The model does not support DMA at the present time.)

$DIOW$

Write signal from the host. The drive will read/latch the data on the rising edge of this signal.

$DIOR$

Read signal from the host. A low indicates data should be made available on the data bus. It is recommended you read/latch the data on the rising edge of the signal.

IORDY

When low the device is not ready to carry out a data transfer to/from the host and the data bus. When high impedance the device is ready to carry out a data transfer.

SPSYNC:CSEL

This signal has two uses (three if you count its legacy use as an address latch signal): the first being SPSYNC which allows the spindles of two drives to be synchronised; the second being CSEL which allows the slave and master drive to be configured by means of this signal rather than by a jumper or other means on the drives themselves.

SPSYNC

SPSYNC can be in input or an output, depending on weather the drive is selected and a synchronisation master or synchronisation slave. There is no fixed protocol for using SPSYNC and can be used in any way the drive vendor wishes, though there is a suggested protocol. The suggested protocol is that the synchronisation master output a pulse on SPSYNC once per spindle revolution, (or multiple thereof,) whilst the synchronisation slave only set DRDY during the power on or reset sequence, once synchronisation is archived.

CSEL

CSEL is an input that is examined during power on, if it is grounded the device is a master, if open circuit the device is a slave.

$DMACK$

This input sent by the host indicate that the data has either been received or is being transmitted over the data bus. (The model does not support DMA at the present time.)

INTRQ

This output indicates that the drive has a pending interrupt, this will only be asserted if an interrupt is pending, the drive is selected and nIEN has not been cleared in the device control register. This output can be cleared by a write to the command register, a read of the status register, setting SRST in the control register or a signal on the $RESET$ line. If nIEN is true or the drive is not selected this output is high impedance.

$IOCS16$

This signal is an open collector output, indicating that the data transfer on the data bus is 16 bit. (This only applies to PIO data and not to DMA data, though DMA is not presently supported by this model.)

DA0->DA2

These signals form a three bit address for accessing the devices internal registers.

$PDIAG$

PDIAG is asserted by the slave device to indicate to the master drive that diagnostics have been passed. During a power on reset the master will wait up to 31 seconds for the slave to complete power up and diagnostics. During an execute drive diagnostics command the master will wait 6 seconds for the slave to complete its diagnostics.

$CS1FZ$ and $CS3FX$

$CS1FX and $CS3FX$ are chip select signals used in conjunction with DA0 to DA2, to select the appropriate registers. $CS1FX$ selects the command block registers, $CS3FX$ selects the control block registers. $CS1FX$ and $CS3FX$ could have been implemented as DA3, however they have been retained as a legacy from when their were genuinely two chips used for the hard drive controllers registers.

$DASP$

There are two uses for DASP: during power on or after a reset DASP is asserted by the slave device to indicate its presence to the master device; DASP can be asserted by any device during normal operation to indicate the drive is active. (An active drive is not necessarily a busy drive.) The output of DASP is open collector, and each drive has in internal pull up resistor. DASP can generally be used to drive a drive activity LED.